A Versatile General Multiplier Divider Cell by Using Operational Trans-Resistance Amplifiers

Authors

  • Nabil I. Khachab EE Department, Kuwait University P.O. Box 5969, Safat 13060, Kuwait
  • Abdallah Cherri EE Department, Kuwait University P.O. Box 5969, Safat 13060, Kuwait
  • Ahmad Hayssam EE Department, Kuwait University P.O. Box 5969, Safat 13060, Kuwait

DOI:

https://doi.org/10.53555/nneee.v4i8.161

Keywords:

Multipliers, Dividers, Computational circuits,, OTRA

Abstract

In this paper, we present the design of a versatile general multiplier-divider cell by using the Operational Trans-resistance Amplifier (OTRA) and MOSFETs operating in the linear region. The design and the basic operation of this block is verified. Other operations can also be realized by simply choosing the inputs of the signals at the different terminals. These operations include square root operation, scalar vector multiplier and modulation to name a few. The new cell is reconfigurable and can be programmed by DC voltages. The resulting circuits are simulated by 0.18 m CMOS process through PSPICE. These simulation results verify the versatile operation of this cell.

References

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Published

2017-08-31

How to Cite

Khachab, N. I., Cherri, A., & Hayssam, A. (2017). A Versatile General Multiplier Divider Cell by Using Operational Trans-Resistance Amplifiers. Journal of Advance Research in Electrical & Electronics Engineering (ISSN 2208-2395), 4(8), 01-06. https://doi.org/10.53555/nneee.v4i8.161